1. Field of the Invention
This invention relates generally to transducer interface circuits that detect a change in capacitance as a measure of change in a targeted physical quantity and, more particularly, to a highly configurable capacitive transducer interface circuit that is programmable to accommodate a differential or single-ended sensor, to provide a desired gain and offset, and to provide a desired bandwidth.
2. Description of the Related Art
A number of patents have been issued to other circuit arrangements for measuring capacitance. The prior art, however, has focused on increasing the sensitivity of circuits by employing techniques to compensate for effects of parasitic capacitance, and to reduce the influence of scaling factors. A patent awarded to Reinhard, et al, xe2x80x9cCircuit Arrangement and Method For Measuring a Difference In Capacitance Between a First Capacitance C1 and a Second Capacitance C2xe2x80x9d (U.S. Pat. No. 5,777,482), uses evaluation logic to isolate the unwanted parasitic capacitance. A patent awarded to W. J. Kaiser, et al., xe2x80x9cCMOS Integrated Microsensor With A Precision Measurement Circuitxe2x80x9d (U.S. Pat. No. 5,659,195), integrated the transducers with CMOS circuits to eliminate the parasitic capacitance. The invention by G. Schneider, xe2x80x9cCapacitive Sensor signal Processing Arrangement Using Switch Capacitor Structuresxe2x80x9d (U.S. Pat. No. 5,451,940), switched the two inputs of operational amplifier to remove the charges due to connection with external electric effects, hence allowing connection of a reference capacitor to any desired potential. In the patent xe2x80x9cPrecision Capacitve Transducer Circuit and Methodsxe2x80x9d (U.S. Pat. No. 5,028,876) the proposed arrangement of circuits used switching techniques and common measurements to extract the ratio of the difference and sum of capacitance to remove the effects of parasitic capacitance, magnitude of the transducer capacitance, and scaling factors.
A significant disadvantage with the foregoing circuits is that they can only be optimized for a relatively small range of input parameters. Each circuit must be individually xe2x80x9ctunedxe2x80x9d to eliminate parasitic capacitance, and changed for different connections. Each type of transducer requires its own electronics, and xe2x80x9cuniversalxe2x80x9d signal processing circuit is not possible. Second, the prior art does not address the ability of a single circuit to measure both absolute changes (single-end) and relative changes (differential). Third, the prior art does not address the need to accommodate different bandwidth requirements. Fourth, the prior art does not address the manufacturing of the integrated circuits wherein processing tolerances often result in variations of on-chip resistors and capacitors which alters the circuit sensitivity. There remains a need, therefore, for a capacitance measurement circuit that accommodates wide differences in connectivity, bandwidths, and capacitance magnitudes.
In a first aspect, the invention may be regarded as a capacitive transducer interface circuit that produces an output value that is proportional to a change in capacitance of a sense capacitor in a capacitive transducer comprising: an integrated circuit having: (1) a capacitive adjustment section that is electrically connected to the sense capacitor, including: (a) a capacitor array circuit; (b) means for configuring the capacitance of the capacitor array circuit such that the sense capacitor and capacitive adjustment section combine to provide a substantially null value when the capacitive transducer is in a null state; and (2) a capacitive trans-impedance amplifier section that is electrically connected to the sense capacitor and the capacitive adjustment section, including: (a) a trans-impedance amplifier means for producing an output signal that is proportional to the change in capacitance of the sense capacitor; and (b) means for configuring the gain of the capacitive trans-impedance amplifier to provide a desired dynamic range.
In a second aspect, the invention may be regarded as a capacitive transducer interface circuit that produces an output value that is proportional to a difference in capacitance between first and second capacitors that are connected together at a common terminal, comprising: (a) a trans-impedance amplifier means for producing an output signal that is proportional to the difference in capacitance between the first and second capacitors, said trans-impedance amplifier means including an operational amplifier having an inverting input, a non-inverting input, and an output, with the inverting input connected to the common terminal, with the non-inverting input connected to a reference ground, and with a feedback capacitance connected between the output and the non-inverting input; (b) a means for repeatedly (1) discharging the feedback capacitance, (2) applying a voltage difference across the first capacitors to charge the first capacitor while applying an equal potential voltage across the second capacitor to discharge the second capacitor; and (3) then reversing the voltages applied to the first and second capacitors such that the first capacitor discharges into the second capacitor and integrates into or out of the feedback capacitance to the extent there is any difference in capacitance between the first and second capacitors.